FPGA Projects
From Hamsterworks Wiki!
Projects I've been playing with that use Field Programmable Gate Arrays, and their status
| Project | Description | Status |
|---|---|---|
| Audio filter | Simulating a passive analogue audio filter | Planning |
| Dualhead MCB Frame Buffer | Adding a DVI-D output to the MCB Frame Buffer | Completed |
| MCB Frame Buffer | Creating a 720p frame buffer in the Pipistrello's LPDDR memory | Completed |
| USB TTL RS232 | Using the Papilio as a TTL RS232 adapter | Completed |
| Spartan 6 1080p | Generating 1080p on a Spartan 6 LX | Completed |
| High Speed Link | High speed transfer between two FPGAs | Completed |
| RS232_dumper | Capture then dump data to the RS232 port | Completed |
| Zedboard_HDMI | Driving the Zedboard's HDMI interface | In Development |
| Zedboard_OV7670 | Attaching a low cost camera to the Zedboard | Completed |
| Async_VGA | A VGA Controller that works with bursts of data (e.g. from SDRAM) | Completed |
| FreqSwitch | CHanging a DCM_CLKGEN's output "on the fly" to generate different frequencies | Completed |
| FM_SOS | Send SOS with a simple FM transmitter | Completed |
| OV7670_camera | Video capture from a cheap camera module | Completed |
| Digilent EPP Performance | Performance difference in the EPP port speed on digilent boards | Completed |
| OSERDES2 clocking | Setting up the clocking infrastructure for high speed serial output | Untested |
| frequency_counter | GPS referenced frequency counter | Completed |
| hidef_snow | Generate static in 1080p | Completed |
| config_flash | Storing arbitrary data in the configuration flash | Completed |
| async_reset | Testing async reset reliability | Completed |
| meta_test | Testing for metastability | Completed |
| if vs case | Testing different implementations | Completed |
| ray_cast | A "ray casting" 3D maze walk through | In Progress |
| dx_display | Driving a Deal Extreme TM1638 7 Seg Display | Completed |
| Synth | A simple all-digital Synth, in bite sized parts | Partially complete |
| Crystal Castles | Reimplementing the old arcade machine on an FPGA | In progress |
| CheapScope | A simple fabric embedded logic analyser, with and RS232 interface | Completed |
| dvid_test | Driving a DVI-D interface from a Spartan 6 FPGA | Completed |
| HDlife | Implementing Conway's Game of Life at full HD | Completed |
| FPGAheli | Controlling an Infrared Helicopter | Completed |
| shortwave | A very quick and dirty shortwave transmitter | Completed |
| AVR8 core | An AVR103 nearly compatible soft core originally from OpenCores | Running, but no documentation yet. |
| 10BaseT-TX | Sending out Ethernet packets directly from the FPGA | Completed |
| SPDIF_Input | Capturing and converting digital audio data from DVD players | Completed |
| SPDIF_out | Generating digital audio data output | Completed |
| SPDIF_Volume | A simple digital volume control for a S/PDIF signal - a very simple DSP | Completed |
| SPDIF_Thru | A passthrough for S/PDIF singal - a base for DSP projects | Completed |
| VGA Display | Generating the timings for 1440x900 VGA output | Completed |
| WavePlay | Playing 8bit stereo audio samples from Block RAM | Completed |
| Mandelbrot | Yet another FPGA Mandelbrot viewer | Completed |
| DSPfract | Yet another FPGA Mandelbrot viewer - this time using Spartan 6 DSP48A bocks | Completed |
| Radix2div | Radix 2 division in VHDL | Completed |
| Radix4div | Radix 4 division in VHDL | Abandoned |
| SDRAM Memory Controller | Memory controller for the SDRAM chip on the Terasic DE0-nano | Design complete, implementation mostly complete. Testing to start. |
| uClinux | Bringing up uClinux on a Terasic DE0-nano board | Completed |
| MAF6502 | A FPGA implementation of the classic MOS6502 processor | On hold |
| Papilio Plus/Pacman | Building the Pacman implementation from http://fpgaarcade.com on the Spartan 6 hardware | Completed |
| Papilio Plus/Fading counter | A softly fading binary counter | Completed |
| Papilio Plus/PS2 Keyboard | Using the PS/2 keyboard interface | Completed |
| Papilio Plus/SRAM test 2 | writes and verifies test patterns in the SRAM on the Papilio Plus @ 100MHz | Completed |
| CUGA-1 | A CPU Using Gate Arrays | On hold |
There is also a whole lot of mini projects on the Papilio Plus page, for testing interfaces.