From Hamsterworks Wiki!
This FPGA Project was finished in August 2015.
Update - real time Sobel edge detection in action https://www.youtube.com/watch?v=hHVcPGt3IiU
This little picture makes me really happy:
This project does the following actions:
- Advertise HDMI support over EDID/DCC
- Receive the TMDS signals
- De-serialize them into 10-bit symbols
- Align the symbols using bitslips
- Tune the input delays for best reception
- Convert the TMDS symbols into data values
- Extract CTL, Aux Data Periods (ADPs) and Video Data Periods (VDPs)
- Extract Video Infoframes from the ADP data
- Extract Audio Samples from the ADP data.
- Extract Raw Pixels from the VDPs
- Perform 422 to 444 conversion, if required by video format
- Perform YCbCr to RGB conversion, if required by video format
- Convert Studio Level RGB to Full Range RGB, if required by video format
- Convert Audio smaples to a relative db level
- Overlay Audio level meters over the video stream
- Convert the video stream and sync signals back to TMDS symbols
- Serialize them through a 10:1 serialisers
- Transmit the TMDS.
I've also added 'rule of thirds' guidelines, which can be switched off and on.
This is an awesome base for any video experimentation. A video of it in action is at http://youtu.be/nY190-QIJis
This design uses
- 339 slices (930 LUTs, 909 registers)
- 1 BLock RAM slice
- 9 DSP slices (higher than expected... should be 5),
Rather than individual files, I've put everything needed into a GitHub repo.
Please feel free to fork and extend. If you make any changes, just add your name to the file before you push
Call for donations
The amount of time/work that has gone into this design is pretty significant. If you find it useful consider using PayPal to buy me a beer!
I'll most probably spend it on more FPGA-related toys though!