Papilio Plus/Memory

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Memory used on Papilio Plus is an IS61WV25616ALL-10TL - 10ns async CMOS static RAM. Data sheet is at http://www.issi.com/pdf/61WV25616.pdf

I've written a SRAM testbench that may help in simulating this device.

Performance

Read of 200MB/s, write of 200MB/s


# Address lines
NET "addr<0>" LOC = "P6"  | IOSTANDARD=LVTTL;
NET "addr<1>" LOC = "P7"  | IOSTANDARD=LVTTL;
NET "addr<2>" LOC = "P9"  | IOSTANDARD=LVTTL;
NET "addr<3>" LOC = "P10"  | IOSTANDARD=LVTTL;
NET "addr<4>" LOC = "P11"  | IOSTANDARD=LVTTL;
NET "addr<5>" LOC = "P141"  | IOSTANDARD=LVTTL;
NET "addr<6>" LOC = "P140"  | IOSTANDARD=LVTTL;
NET "addr<7>" LOC = "P139"  | IOSTANDARD=LVTTL;
NET "addr<8>" LOC = "P138"  | IOSTANDARD=LVTTL;
NET "addr<9>" LOC = "P137"  | IOSTANDARD=LVTTL;
NET "addr<10>" LOC = "P46"  | IOSTANDARD=LVTTL;
NET "addr<11>" LOC = "P45"  | IOSTANDARD=LVTTL;
NET "addr<12>" LOC = "P44"  | IOSTANDARD=LVTTL;
NET "addr<13>" LOC = "P43"  | IOSTANDARD=LVTTL;
NET "addr<14>" LOC = "P41"  | IOSTANDARD=LVTTL;
NET "addr<15>" LOC = "P29"  | IOSTANDARD=LVTTL;
NET "addr<16>" LOC = "P30"  | IOSTANDARD=LVTTL;
NET "addr<17>" LOC = "P32"  | IOSTANDARD=LVTTL;
#NET "addr<18>" LOC = ""; 

# Data lines
NET "data<0>" LOC = "P14"  | IOSTANDARD=LVTTL;
NET "data<1>" LOC = "P15"  | IOSTANDARD=LVTTL;
NET "data<2>" LOC = "P16"  | IOSTANDARD=LVTTL;
NET "data<3>" LOC = "P17"  | IOSTANDARD=LVTTL;
NET "data<4>" LOC = "P5"  | IOSTANDARD=LVTTL;
NET "data<5>" LOC = "P2"  | IOSTANDARD=LVTTL;
NET "data<6>" LOC = "P1"  | IOSTANDARD=LVTTL;
NET "data<7>" LOC = "P143"  | IOSTANDARD=LVTTL;
NET "data<8>" LOC = "P40"  | IOSTANDARD=LVTTL;
NET "data<9>" LOC = "P35"  | IOSTANDARD=LVTTL;
NET "data<10>" LOC = "P34"  | IOSTANDARD=LVTTL;
NET "data<11>" LOC = "P33"  | IOSTANDARD=LVTTL;
NET "data<12>" LOC = "P21"  | IOSTANDARD=LVTTL;
NET "data<13>" LOC = "P22"  | IOSTANDARD=LVTTL;
NET "data<14>" LOC = "P23"  | IOSTANDARD=LVTTL;
NET "data<15>" LOC = "P24"  | IOSTANDARD=LVTTL;

# Control lines
NET "ce" LOC = "P12"  | IOSTANDARD=LVTTL;
NET "we" LOC = "P142" | IOSTANDARD=LVTTL;
NET "oe" LOC = "P27"  | IOSTANDARD=LVTTL;
#NET "be" LOC = "P26" | IOSTANDARD=LVTTL; # This is wired to both UB and LB on early revision boards.
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