Shortwave

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This FPGA Project was completed Feb 2012.

Somebody on http://www.hackaday.com was saying that no modern processors would come in DIP packages because they radiate RF like crazy.

That got me thinking... can I make 'useful' RF signal from just an FPGA and some wire?

Well yes, I can. And it is pretty simple - at least to send 'SOS' in morse code.

Contents

The design

I havn't got a HAM radio setup, just a shortwave receiver, and I know very little about RF except how amplitude modulation (AM) works that the easiest antenna is a length of wire that is half the wavelength of the transmitted signal.

To carry a useful signal modulation of the transmitted signal is required. As the FPGA is all digital the easiest way it to output on multiple wires - so if one wire is driven a signal of strength 'x' is generated, and if four wires are then driven something like four times the signal strength will be transmitted.

My Nexys2 board has a 50MHz crystal on it, and if I divide that frequency by two I get 25MHz - towards the 30MHz upper end of my shortwave's tuning. Looking at http://en.wikipedia.org/wiki/Dipole_antenna it will need a 5.72m antenna - 2.86m in either direction. Pretty easy to build.

As the I/O pins are driving at LVCMOS25 levels, and all have a 200 Ohm resistor in series for ESD protection only a few milliwatts will be available, even if the antenna was perfectly matched.

So here's the (ultra simple) build:

Antenna.png

Four 2.86m 24SWG enameled copper wire in one direction, one for ground to run in the other direction, with the enamel scratched off and jammed into a PMOD cable. You can't get more brutal than that.

The project

Only a couple of dozen likes of code are required to generate a test signal. Here they are:

shortwave.vhd

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity shortwave is
   port (
      Clk : in    std_logic;
      ja  : out   std_logic_vector(3 downto 0)
   );
end shortwave;

architecture Behavioral of shortwave is
   signal counter    : std_logic_vector(21 downto 0) := (others => '0');
   signal message    : std_logic_vector(33 downto 0) := "1010100011101110111000101010000000";
   signal carrier    : std_logic := '0';
   signal modulation : std_logic := '0';
begin
   carrier    <= counter(1);
   modulation <= counter(1) and counter(16) and message(0);
   -- Put the outgoing RF signals on the expansion connector (ja)
   ja         <= modulation  & modulation & modulation & carrier;
   
   process(clk)
   begin   
      if rising_edge(clk) then
         if counter = 0 then 
            message <= message(0) & message(33 downto 1);
         end if;
         counter <= counter + 1;
      end if;
   end process;
end Behavioral;

nexys2.ucf

NET "clk"   LOC = "B8";
NET "JA<0>" LOC = "L15"; 
NET "JA<1>" LOC = "K12"; 
NET "JA<2>" LOC = "L17"; 
NET "JA<3>" LOC = "M15"; 

Results

With a tiny (30cm) antenna the signal is received within the same room. With the 5.62m long antenna the signal carries for a few tens of meters.

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