Module 2

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Getting the first design to work is always the hardest.


Aim of project

To wire two switches up to the LEDs.

Learning outcomes

  • Create a new project
  • Create a new VHDL module
  • Enter basic code
  • Implement the design
  • Create an implementation constraints file
  • Try the programming tools
  • Test the design in hardware
  • Experience single wire inputs and outputs

Wow! That is a lot of learning for a second module

Step 1 - Create a new Project

- Click on "Xilinx ISE Design Suite 13.3" Studio Icon - From the "File" menu, choose "New Project" - Name the project "Switches+LEDs", and click on "Next".


- This screen is where you say what FPGA you are using. Choose the following settings to tell the design tools what chip you are using, then press the "Next" button.


- Click on the "Finish" button to create and open the new project

Step 2 - Create a new VHDL Module

- Right-click on the design window, on the FPGA device, and choose "New Source"


- Highlight "VHDL module" and in the file name enter "Switches_LEDs", then press the "Next button". - This next dialog box allows you to define what connections the module has. We need four connections - two the the switches and two for the LEDs:


- Click the "Next" button, then "Finish" to create the module and open it in the editor. To make things clearer, delete any line that starts with "--" - they are comments that do not influence the design.

 1: library IEEE;
 2: use IEEE.STD_LOGIC_1164.ALL;
 4: entity Switches_LEDs is
 5:    Port ( switch_0 : in  STD_LOGIC;
 6:           switch_1 : in  STD_LOGIC;
 7:           LED_0 : out  STD_LOGIC;
 8:           LED_1 : out  STD_LOGIC);
 9: end Switches_LEDs;
11: architecture Behavioral of Switches_LEDs is
12: begin
14: end Behavioral;

As you can see, it has created the definition for an entity called Switches_LEDs, with two inputs and two outputs - STD_LOGIC is used to indicate what values these inputs and outputs can have.

The architecture section is where you describe how the internal logic of the module actually works. For this project we use the "assignment" operator ("<=") to assign the LEDs the values of the switches:

library IEEE;

entity Switches_LEDs is
    Port ( switch_0 : in  STD_LOGIC;
           switch_1 : in  STD_LOGIC;
           LED_0 : out  STD_LOGIC;
           LED_1 : out  STD_LOGIC);
end Switches_LEDs;

architecture Behavioral of Switches_LEDs is
  LED_0 <= switch_0;
  LED_1 <= switch_1;
end Behavioral;

If you press the green "play" arrow in the middle left of the design window the project should start building.

If your code has been entered successfully the project will build without any errors, and the design Window will now look like this: M1p5.png

Great! You've built your first design! There is only one problem, and that is we haven't told the design tools which pin to connect these signals to.

Step 3 - Creating constraints

To tell the tools which pins to connect the signals to an "Implementation Constraints File" is needed.

- From the "Project Menu" choose "New Source" - Select "Implemntation Constraints File" and call it "Constraints"/ M1p6.png - then click "Next" and "Finished". - In the design windows, a small '+' will appear by the Switches_LEDs module. Click that to show the new file: M1p7.png - Double click "constraints.ucf" to open it in the editor window. - Add the following lines:

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